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Processing Near or In Memory for Deep Learning


Speaker

Lide Duan, Alibaba DAMO Academy

Time

2019-05-16 16:00:00 ~ 2019-05-16 17:00:00

Location

Room 3-412, SEIEE Building

Host

Jingwen Leng, Assistant Professor, John Hopcroft Center for Computer Science

Abstract

Emerging applications such as deep learning are highly memory-intensive, making the main memory a bottleneck in both performance and energy efficiency in current computer systems. Conventional DRAM-based main memory is facing critical challenges in improving latency and scalability. Therefore, multiple computer architecture techniques have been proposed to concur this “memory wall”. First, non-volatile memories (NVM) are being used to replace DRAM to achieve low idle power and long data retention time. Second, processing-near-memory (PNM) or processing-in-memory (PIM) places compute logic near or within main memory to reduce costly data movements. Third, 3D stacking vertically stacks multiple memory and logic dies to improve memory capacity, offering a new dimension of scalability in chip design.

In this talk, we will examine state-of-the-art architecture designs that integrate multiple above innovations, e.g., NVM + PIM (processing NN in NVM) and PNM + 3D (HBM/HMC-based designs for deep learning). In particular, we will introduce a new 3D-stacked processing-in-NVM framework that has greatly improved NN processing throughput and 3D-aware model mapping and data flow management.


Bio

Dr. Lide Duan is currently a research scientist in the Computing Technology Lab of Alibaba DAMO Academy in Sunnyvale, California. His research interest is in computer architecture with a recent focus on machine learning acceleration and non-volatile memory systems. Prior to joining Alibaba in March 2019, he was an assistant professor in the Department of Electrical and Computer Engineering at University of Texas at San Antonio (UTSA) from 2014 to 2019, where he founded the Systems and Architectures Lab and mentored several graduate students to conduct cutting edge research in computer architecture. Prior to joining UTSA, he was a senior design engineer in AMD Austin R&D center from 2012 to 2014, working on CPU microarchitecture design and performance modeling. He has published nearly 30 papers in top-tier international conferences and research journals. He received a PhD degree in ECE from Louisiana State University in 2011 and a Bachelor’s degree in Computer Science from Shanghai Jiao Tong University in 2006.

© John Hopcroft Center for Computer Science, Shanghai Jiao Tong University
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